Adrian Cochrane on Nostr: I included a bare-bones 16bit RISC "Arithmetic Core" with a couple K of dedicated RAM ...
I included a bare-bones 16bit RISC "Arithmetic Core" with a couple K of dedicated RAM in my hypothetical. Even this *largely* filled my remaining needs!
Though sorting was vital enough sorting to let my "Parsing Unit" branch over the Arithmetic Core's flags register. Amongst other optimizations...
LZ-compression prompted me to add a mode with a full 64k of 16bit RAM. Having the Arithmetic Core feed strings to the Parsing Unit for it to match would be an elegant implementation!
2/4?
Published at
2024-06-27 19:41:43Event JSON
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