mos_8502 :verified: on Nostr: So here's the idea. This module takes up to eight 512KB 8-bit SRAM chips, TSOP-I-32 ...
So here's the idea.
This module takes up to eight 512KB 8-bit SRAM chips, TSOP-I-32 footprint, 10nS, plus a 3-to-8 decoder. To the pads on the bottom edge, you solder "vertical" two-row 2.54mm pitch pin headers. The result is a memory module which, using the attached pinout, can support up to 16MB of 8- or 16-bit SRAM, in an easy-to-manufacture form factor that fits right into a neo-retro design.
I call them DIPPs -- dual in-line pin packages. I figure this is about the sweet spot for neo-retro designs, because one stick suffices for most platforms, but it's flexible enough to be used for future designs that might use, for example, a 32-bit RISC-V on an FPGA carrier.
This module takes up to eight 512KB 8-bit SRAM chips, TSOP-I-32 footprint, 10nS, plus a 3-to-8 decoder. To the pads on the bottom edge, you solder "vertical" two-row 2.54mm pitch pin headers. The result is a memory module which, using the attached pinout, can support up to 16MB of 8- or 16-bit SRAM, in an easy-to-manufacture form factor that fits right into a neo-retro design.
I call them DIPPs -- dual in-line pin packages. I figure this is about the sweet spot for neo-retro designs, because one stick suffices for most platforms, but it's flexible enough to be used for future designs that might use, for example, a 32-bit RISC-V on an FPGA carrier.