LisPi on Nostr: nprofile1q…aj2q5 Vector registers seem large-enough to use as scratch buffers. As ...
nprofile1qy2hwumn8ghj7un9d3shjtnddaehgu3wwp6kyqpqx4ep49e7cdcvwtyhs27a6j5xlet703mqfag7l22fhjepuyceexvq9aj2q5 (nprofile…j2q5) Vector registers seem large-enough to use as scratch buffers. As for where to originally store the data, unless the bus is legitimately ridiculously wide, I'd suggest using serial access patterns (CPU read logical X => read physical X, read physical X + Y, do parity calcs X with Y using some reserved registers, store X in CPU other registers/etc ).
Logically it'd reduce the total usable amount of memory but that seems like an acceptable sacrifice to me.
Non-ECC memory is fairly affordable (even ECC, the expensive parts are the motherboard & CPU classes that support it).
Doing it in CPU would also mean less e-waste when one inevitably realizes that ECC is mandatory if one wants any reliability.
Published at
2025-03-19 03:31:58Event JSON
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