Brian Swetland on Nostr: TT provides 8 out, 8 in, and 8 bidir IOs plus rst and clk. For TT07, this design is ...

TT provides 8 out, 8 in, and 8 bidir IOs plus rst and clk. For TT07, this design is running the Z80 core at 1/4 the project clock (so 12.5Mhz for the max 50MHz clock) and alternating between control, A0-A7, control, and A8-A15 on the out pins, D0-7 on the bidir pins, control inputs on the in pins:

https://github.com/rejunity/z80-open-silicon/blob/68438f00192e7b2388163e198b330567e6133cb7/src/tt_um_rejunity_z80.v#L24

The README implies that after prototyping on TT07 the plan is ChipIgnite runs for QFN44 and DIP40 packages (presumably classic Z80 pin-compatible).